1301136 Transistor logic circuits INTERNATIONAL BUSINESS MACHINES CORP 22 July 1970 [4 Aug 1969] 35471/70 Heading H3T A logic circuit such as a NOR gate, Fig. 4, has a constant current from 54 switched between a first path leading to a logical network 51, 52' 53 and a second path 60, in dependence upon the inputs A, B, C, the second path being connected to a second constant current device 56 across which an output circuit 62, 63 is connected and carries that current in excess of the current carrying capacity of 56. The FET's shown are Schottky barrier FET's which are held off at zero gate bias by their contact voltage and which provide current flow from gate to source when the polarity is appropriate; and Schottky diodes 58 give level shift. The second current path 60 may have parallel paths 59 giving fan-out to other output circuits. When ABC are all low, the current from FET 54 flows through FET 55 gate to 61 and adds to the current caused to flow thereby in the drain-source path of the same FET 55. This is arranged to exceed the current capacity of FET 56, which is normally fully conducting due to the standing current in FET 55, by a sufficient amount to provide the required output current drive to FET 57 plus a current surplus to charge circuit capacitances during the initial change to the all ABC low condition. A one or more of the inputs ABC goes high, the corresponding FET 51, 52, 53 initially carries more current than FET 54 can supply, thus charging circuit capacitances, and then carries the current from FET 54 only; the FET 55 now being non-conductive, and the output D following to a low state.